Sense amplifiers are commonly used in memory devices, such as random access memories (RAMs), read only memories (ROMs), and more specialized memories, such as content addressable memories (CAMs).
Continuing goals for nearly all integrated circuits include lower power consumption, higher operating speeds, and lower operating voltages. In the particular case of CAM devices, sensing operations can consume considerable current (and hence power), as such operations typically involve the continuous charging of multiple match lines, and the subsequent discharging of selected match lines. Sense amplifier circuits are usually connected to such match lines to detect a match line state following a compare operation. In particular, for some conventional CAMs, a match line representing a match result (i.e., a HIT) can remain charged, while a match line representing a mismatch result (i.e., a MISS), can be discharged to or at least toward a low voltage power supply (e.g., Vss).
One conventional sense amplifier circuit is disclosed in “A Ternary Content-Addressable Memory (TCAM) Based on 4T Static Storage and Including Current-Race Sensing Scheme”, IEEE Journal of Solid-State Circuits, Vol. 38, No. 1, Jan. 2003, pp. 155–158 by Arsovski et al. Another conventional sense amplifier circuit is shown in “A Current-Saving Match-Line Sensing Scheme for Content-Addressable Memories”, ISSCC 2003, Session 17, SRAM and DRAM, Paper 17.3 by Arsovski et al., pp. 304–305 (Referred to herein as Arsovski et al. II).
Yet another conventional sense amplifier is shown in FIG. 6. FIG. 6 shows an example of a single ended sense amplifier employed in a ternary CAM device. In FIG. 6, a sense amplifier 600 can be coupled to a compare stack 602. A compare stack 602 represents one of many bit compares in a sense operation. Such bit compares can compare a compare data value (represented by complementary values CD and BCD) to a data value (represented by complementary values D and BD). A compare result is maskable by a mask value MASK. Such a masking capability can form a “ternary” CAM device, as opposed to a binary CAM device.
The conventional sense amplifier 600 includes p-channel precharge transistors P1 and P2 having sources commonly connected to a power supply voltage VCC, and gates commonly connected to a precharge signal PRECHG. The conventional sense amplifier 600 also includes a holding n-channel transistor N1 and sensing n-channel transistor N2. Transistors N1 and N2 may have drains connected to the drains of transistors P1 and P2, respectively. The sources of transistors N1 and N2 can be commonly connected to a match line 604. The gates of transistors N1 and N2 can be commonly connected to a voltage VCCQ. A voltage VCCQ can maintain transistors N1 and N2 in an off state when a match line 604 is precharged, as will be described below.
The drain—drain connection of transistors P2 and N2 can be connected to a sense node 606. Sense node 606 can be precharged by precharge p-channel transistors P3 and P4 arranged in series between sense node 606, and power supply voltage VCC. The potential at sense node 606 can be buffered by series connected inverters INV1 and INV2 to provide sense amplifier output signal SAOUT.
The operation of the conventional sense amplifier 600 will now be described.
In a pre-sense period, match line 604 can be precharged to a voltage VCC-Vtn1. A value Vtn1 can be the threshold voltage of holding transistor N1. It is noted that sensing transistor N2 is designed to have a higher threshold voltage (e.g., at least 200 mV) than holding transistor N1. Thus, once match line 604 is precharged to VCC-Vtn1, sensing transistor N2 is turned off.
In a sense period, data values (e.g., D and BD) can be compared to compare data (e.g., CD and BCD) within a compare stack 602. In the event a sense operation indicates a match (e.g., a HIT), all compare stacks (multiple compare stacks connected to match line 604) can maintain a relatively high impedance between the match line 604 and ground (VSS). In this state, sense amplifier 600 can utilize the difference in threshold voltages of transistors N1 and N2, to keep transistor N2 turned off. With transistor N2 turned off, sense node 606 can be maintained at the precharged VCC potential. Consequently, sense amplifier output signal SAOUT remains high, indicating a HIT state.
In the event a sense operation indicates a mis-match (e.g., a MISS), at least one compare stack will provide a relatively low impedance between the match line 604 and ground (VSS). Thus, the match line 604 will go toward ground (VSS). When the gate-to-source voltage of transistor N2 is larger than Vtn2, the sense transistor N2 will turn on. With transistor N2 on, sense node 606 will discharge through sense transistor N2 and the compare stack 602 to ground (VSS). Consequently, the sense amplifier output signal SAOUT transitions low, indicating a MISS state.
Thus, the conventional sense amplifier 600 operation can include precharging a match line 604 to VCC-Vtn1, and then discharging the same match line 604 in the event of a MISS state. It is understood that a conventional CAM includes numerous match lines, and in a given sense operation, MISS states are far more common than HIT states. As a result, match operations can consume considerable current as match lines are continuously precharged and then discharged.
In light of the above, it would be desirable to arrive at a sense amplifier circuit for a CAM device that may have lower current consumption than conventional approaches. It would also be desirable for such a sense amplifier circuit to operate at a relatively lower operating voltage, and relatively higher speed than other conventional approaches.